Superconducting digital technology has provided computing and/or communications resources that benefit from unprecedented high speed, low power dissipation, and low operating temperature. Superconducting digital technology has been developed as an alternative to CMOS technology, and typically comprises superconductor based single flux quantum superconducting circuitry, utilizing superconducting Josephson junctions, and can exhibit typical power dissipation of less than 1 nW (nanowatt) per active device at a typical data rate of 20 Gb/s (gigabits/second) or greater, and can operate at temperatures of around 4 Kelvin.
Data transfer between circuits in a complementary metal-oxide semiconductor (CMOS) environment is frequently implemented via high-speed serial data transfer. In such high-speed serial data transfer, the clock and data can often be embedded on a single line via an encoding scheme. Therefore, the data can be sampled, such as via a phase-locked loop (PLL) that allows the clock signal to be recovered from the single line. However, PLLs do not exist in superconducting technology, such as reciprocal quantum logic (RQL), and the CMOS data transfer techniques are unsuitable from a power standpoint to operate in the cold environment of superconducting implementations.